Compaq AlphaServer DS20 User Manual Page 1

Browse online or download User Manual for Servers Compaq AlphaServer DS20. Compaq AlphaServer DS20E Systems

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Summary of Contents

Page 1 - Technical Summary

Compaq AlphaServer DS20E Systems Technical Summary

Page 2 - Contents

8System Features Auto reboot. On systems running Tru64 UNIX or OpenVMS, a firmware environment variable lets you set the default action the system ta

Page 3 - System Overview

9The primary means of clustering AlphaServer DS20E systems depends on the operating system. • Ethernet, OpenVMS • CI clusters, OpenVMS only • Mem

Page 4 - Architecture

10Compaq AlphaServer DS20E System Diagrams 956741213MR0300A8 MR0301A123456987 1. CPUs 2. System board 3. PCI slots 4. System features module 5.

Page 5 - System Board

11System Features at a Glance Table 1 provides a quick reference to features of Compaq AlphaServer DS20E systems. Table 1 AlphaServer DS20E Feature

Page 6 - Processor Module

12Physical Characteristics Table 2 details basic physical characteristics of the system. Table 2 AlphaServer DS20E Physical Characteristics Dimensi

Page 8 - PCI Bus 1

© 2001 Compaq Computer Corporation Compaq, the Compaq logo, Compaq Insight Manager, AlphaServer, StorageWor

Page 9 - Server Management

Contents System Overview 1 Features and Benefits 1 Architecture 2 System Block Diagram System Board 3 Component and Connector Locations

Page 10 - Clustering

1 Compaq AlphaServer DS20E Systems The Compaq AlphaServer DS20E system delivers high performance for business, technical, and scientific applicat

Page 11 - Service and Support

2Architecture This system is designed to maximize the potential of the Alpha 21264 chip. The traditional bus interconnect has been replaced by a sw

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3System Board The interconnect switch is implemented on the system board by the chipset consisting of one C-chip, two P-chips, and eight D-chips. Thi

Page 13 - System Features at a Glance

4Third-Generation Alpha Chip The third generation of the Alpha microprocessor, the Alpha 21264, is a superscalar superpipelined implementation of the

Page 14 - Physical Characteristics

5Memory The switch interconnect can move a large amount of data over two independent memory data buses. Each memory bus is 256 bits wide (32 bytes).

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6I/O Implementation Two separate 64-bit PCI buses are provided, each with three slots. As can be seen in the block diagram, the C-chip controls both

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7Server Management The AlphaServer products support important operational and platform management requirements. Operational Management Server/Network

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